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LTC3600 1 3600fb typical application features description 15v, 1.5a synchronous rail-to-rail single resistor step-down regulator the LTC3600 is a high efficiency, monolithic synchronous buck regulator whose output is programmed with just one external resistor. the accurate internally generated 50a current source on the iset pin allows the use of a single external resistor to program an output voltage that ranges from 0v to 0.5v below v in . the v out voltage feeds directly back to the error amplifier in unity gain fashion and equals the iset voltage. the operating supply voltage range is 4v to 15v, making it suitable for dual lithium-ion battery and 5v or 12v input point-of-load power supply applications. the operating frequency is synchronizable to an external clock or programmable from 200khz to 4mhz with an external resistor. high switching frequency allows the use of small surface mount inductors. the unique constant on-time architecture is ideal for operating at high frequency in high step-down ratio applications that also demand fast load transient response. efficiency and power loss vs output current applications n single resistor programmable v out n 1% i set accuracy n tight v out regulation independent of v out voltage n easy to parallel for higher current and heat spreading n wide v out range 0v to v in C 0.5v n high efficiency: up to 96% n 1.5a output current n adjustable frequency: 200khz to 4mhz n 4v to 15v v in range n current mode operation for excellent line and load transient response n <1a supply current in shutdown n available in thermally enhanced 12-pin (3mm 3mm) dfn and msop packages n voltage tracking supplies n point-of-load power supplies n portable instruments n distributed power systems l , lt, ltc, ltm, linear technology, the linear logo and opti-loop are registered trademarks and hot swap is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5481178, 5705919, 5847554, 6580258. load current (a) efficiency (%) power loss (w) 0.001 0.1 1 10 0.01 3600 ta01b v in = 12v v out = 2.5v ccm ccm dcm 40 50 60 70 80 30 20 10 0 90 100 0.4 0.5 0.6 0.7 0.8 0.3 0.2 0.1 0 0.9 1.0 dcm power loss high efficiency, 1mhz, 1.5a step-down converter 3600 ta01a 50a 10f 1f 0.1f 22f 2.2h v in 12v v out v out 2.5v v in intv cc iset rt pgfb gnd ith pgood run boost sw LTC3600 mode/ sync 0.1f 49.9k pwm control and switch driver 8 5 7 9 1610 34212 11 13 C + error amp
LTC3600 2 3600fb absolute maximum ratings v in , sw voltage ......................................... C0.3v to 16v sw transient voltage (note 6) .......................C2v to 21v v out , iset voltage ............................................0v to v in boost voltage ............................C0.3v to v in + intv cc run voltage................................................C0.3v to 12v intv cc voltage ............................................ C0.3v to 7v (notes 1, 5) top view dd package 12-lead (3mm w 3mm) plastic dfn 12 11 8 9 10 4 5 3 2 1 pgood v out intv cc boost v in sw iset ith rt pgfb run mode/sync 6 7 13 gnd t jmax = 125c, ja = 55c/w exposed pad (pin 13) is gnd, must be soldered to pcb 1 2 3 4 5 6 iset ith rt pgfb run mode/sync 12 11 10 9 8 7 pgood v out intv cc boost v in sw top view 13 gnd mse package 12-lead plastic msop t jmax = 125c, ja = 43c/w exposed pad (pin 13) is gnd, must be soldered to pcb pin configuration order information lead free finish tape and reel part marking* package description temperature range LTC3600edd#pbf LTC3600edd#trpbf lfxb 12-lead (3mm 3mm) plastic dfn C40c to 125c LTC3600idd#pbf LTC3600idd#trpbf lfxb 12-lead (3mm 3mm) plastic dfn C40c to 125c LTC3600emse#pbf LTC3600emse#trpbf 3600 12-lead plastic msop C40c to 125c LTC3600imse#pbf LTC3600imse#trpbf 3600 12-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a la bel on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ith, rt voltage ..................................... C0.3v to intv cc mode/sync, pgfb, pgood voltage .... C0.3v to intv cc operating junction temperature range (note 2) .................................................. C40c to 125c mse package lead temperature (soldering, 10 sec) ................................................ 300c
LTC3600 3 3600fb electrical characteristics symbol parameter conditions min typ max units v in v in supply range 4 15 v iset i set reference current l 49.5 49.3 50 50 50.5 51 a a i set line regulation l 0.02 0.05 %/v i set drop_out voltage i set > 45a, v in C v set 340 mv i set load regulation i out = 0 to 1.5a 0.25 a error amp input offset (note 4) C3 3 mv error amp load regulation l 0.05 0.1 % minimum v out voltage v iset = 0, r out = 0 10 mv g m (ea) error amplifier transconductance 0.63 0.9 ms t on(min) minimum on-time 30 ns t off(min) minimum off-time 130 ns i lim current limit l 1.6 2 2.4 a negative current limit C0.9 a r top top power nmos on-resistance 200 m r bottom bottom power nmos on-resistance 100 m v uvlo intv cc undervoltage lockout threshold intv cc rising 3.45 3.7 v uvlo hysteresis intv cc falling 150 mv v run run threshold run hysteresis run rising run falling l 1.55 0.13 1.8 v v run pin leakage run = 12v 0 2 a v intvcc internal v cc voltage 5.5v < v in < 15v 4.8 5 5.4 v intv cc load regulation i load = 0ma to 20ma 0.3 % ov output overvoltage pgood upper threshold pgfb rising 0.620 0.645 0.680 v uv output undervoltage pgood lower threshold pgfb falling 0.520 0.555 0.590 v pgood hysteresis pgfb returning 10 mv pgood pull-down resistance 1ma load 200 pgood leakage current pgood = 5v 1 a v mode/sync mode/sync threshold mode v il(max) mode v ih(min) sync v ih(min) sync v il(max) 4.3 2.5 0.4 0.4 v v v v mode/sync pin current mode = 5v 9.5 a f osc switching frequency r t = 36.1k l 0.92 1 1.06 mhz v out pin resistance to ground 600 k v inov v in overvoltage lockout v in rising v in falling 17.5 16 v v i q input dc supply current discontinuous shutdown (note 3) mode = 0, r t = 36.1k v in = 12v, run = 0 700 0 1100 1.5 a a the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2).
LTC3600 4 3600fb note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the lt3600 is tested under pulsed load conditions such that t j t a . the lt3600e is guaranteed to meet performance specifications from 0c to 85c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3600i is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ), where ja (in c/w) is the package thermal impedance. note 3: dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. note 4: the LTC3600 is tested in a feedback loop that adjusts v out to achieve a specified error amplifier output voltage (i th ). note 5: this ic includes overtemperature protection that is intended protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 6: duration of voltage transient is less than 20ns for each switching cycle. electrical characteristics
LTC3600 5 3600fb typical performance characteristics r ds(on) vs temperature load regulation transient response ccm operation, external compensation transient response ccm operation, internal compensation quiescent current vs temperature shutdown i q vs v in temperature (c) C50 r ds(on) (m) 40 260 180 200 220 240 0 120 100 20 140 160 0 80 60 100 150 50 3600 g07 mbot mtop temperature (c) C100 C50 quiescent current (ma) 1.0 4.0 0 2.5 2.0 0.5 3.0 3.5 0 1.5 100 200 150 50 3600 g05 ccm dcm i out (a) 0 normalized v iset and v out (%) 0.2 0.4 0.6 0.8 99 96 100 95 98 97 1.8 1 1.2 1.4 1.6 3600 g01 v in = 12v v out = 3.3v v iset v out 20s/div v out 100mv/div ac- coupled i l 1a/div 3600 g08 v in = 12v v out = 3.3v i out = 0a to 1a l = 4.7h f sw = 1mhz r ith = 27.5k, c ith = 250pf mode = intv cc c out = 47f 20s/div v out 100mv/div ac- coupled i l 1a/div 3600 g09 v in = 12v v out = 3.3v i out = 0a to 1a l = 4.7h f sw = 1mhz ith = intv cc mode = intv cc c out = 47f v in 02 i q (a) 0.2 1.0 46 0.5 0.4 0.1 0.6 0.7 0.8 0.9 0 0.3 10 16 12 14 8 3600 g06 v run = 0 i set current vs temperature temperature (c) C50 i set (a) 50.3 125 50.1 49.9 0 50 C25 25 75 100 150 49.7 49.5 50.5 3600 g02 i set current vs v iset v iset 0 i set (a) 51 4 2 48 45 49 50 44 47 46 12 10 14 16 8 6 3600 g03 v in =15v i set current line regulation v in 0 i set (a) 50.4 4 2 49.8 49.4 50.0 50.2 49.2 49.6 12 10 14 16 18 8 6 3600 g04 i set (v iset = 0v) i set (v iset = 2.5v)
LTC3600 6 3600fb typical performance characteristics switching frequency/period vs rt switch leakage current continuous conduction mode operation discontinuous conduction mode operation intv cc load regulation intv cc current (ma) 0 intv cc voltage (v) 4.90 5.00 20 40 60 4.96 4.88 4.98 4.86 4.94 4.92 10 30 80 100 50 70 90 3600 g17 v sw 5v/div i l 1a/div 3600 g13 v in = 15v v out = 2.5v mode = 0 l = 2.2h v sw 5v/div i l 1a/div 3600 g14 v in = 15v v out = 2.5v mode = intv cc l = 2.2h temperature (c) C50 C30 C10 leakage current (a) 4 10 2 8 0 6 130 50 70 90 110 10 30 3600 g16 v in = 12v mbot mtop rt (k) 0 frequency (mhz) period (s) 1.0 3.5 6 5 4 3 2 1 0 50 2.5 0.5 3.0 0 2.0 1.5 150 200 100 3600 g15 t sw f sw output tracking transient response dcm, operation, external compensation transient response dcm, operation, internal compensation 1ms/div i set voltage v out 2v/div i inductor current 500ma/div 3600 g12 i set voltage v out 20s/div v out 100mv/div ac- coupled i l 1a/div 3600 g10 v in = 12v v out = 3.3v i out = 0.1a to 1a l = 4.7h f sw = 1mhz r ith = 27.5k, c ith = 250pf mode = 0 c out = 47f 20s/div v out 100mv/div ac- coupled i l 1a/div 3600 g11 v in = 12v v out = 3.3v i out = 0.1a to 1a l = 4.7h f sw =1mhz ith = intv cc mode = 0 c out = 47f
LTC3600 7 3600fb typical performance characteristics efficiency vs load current v out = 3.3v, v in = 12v rising run threshold vs temperature start-up waveform temperature (c) C60 C40 run threshold (v) 1.45 1.60 C20 1.50 1.55 1.40 20 140 60 80 100 120 40 0 3600 g18 efficiency vs load current v out = 1.2v, v in = 12v load current (a) efficiency (%) 0.001 0.1 1 10 0.01 3600 g19 ccm dcm 40 50 60 70 80 30 20 10 0 90 100 load current (a) efficiency (%) 0.001 0.1 1 10 0.01 3600 g20 ccm dcm 40 50 60 70 80 30 20 10 0 90 100 start-up waveform start-up waveform start-up waveform v in overvoltage 20ms/div v in 5v/div v out 1v/div sw 10v/div 3600 g25 v in = 12v to 18v to 12v v out = 3.3v i out = 1a v in resistor = 30 mode = ccm 1ms/div run 5v/div v out 2v/div i l 3600 g21 mode = ccm no prebiased v out v in = 12v v out = 3.3v 1ms/div run 5v/div v out 2v/div i l 1a/div 3600 g22 mode = dcm no prebiased v out v in = 12v v out = 3.3v 1ms/div run 5v/div v out 2v/div i l 1a/div 3600 g23 mode = ccm v out is prebiased to 2v v in = 12v v out = 3.3v 1ms/div run 5v/div v out 2v/div i l 1a/div 3600 g24 mode = dcm v out is prebiased to 2v v in = 12v v out = 3.3v
LTC3600 8 3600fb pin functions iset (pin 1): accurate 50a current source. positive input to the error amplifier. connect an external resistor from this pin to signal gnd to program the v out voltage. connecting an external capacitor from iset to ground will soft start the output voltage and reduce current inrush when turning on. v out can also be programmed by driving iset directly with an external supply from 0 to v in , in which case the external supply would be sinking the provided 50a. do not drive v iset above v in or below gnd. do not float iset. ith (pin 2): error amplifier output and switching regulator compensation point. the internal current comparators trip threshold is linearly proportional to this voltage, whose normal range is from 0.3v to 2.4v. for external compensation, tie a resistor (r ith ) in series with a capacitor (c ith ) to signal gnd. a separate 10pf high frequency filtering capacitor can also be placed from ith to signal gnd. tying ith to intv cc activates internal compensation. rt (pin 3): switching frequency programming pin. con- nect an external resistor (between 100k to 10k) from rt to sgnd to program the frequency from 400khz to 4mhz. tying the rt pin to intv cc programs 1mhz operation. do not float the rt pin. pgfb (pin 4): power good feedback. place a resistor divider on v out to detect power good level. if pgfb is more than 0.645v, or less than 0.555v, pgood will be pulled down. tie pgfb to intv cc to disable the pgood function. tying pgfb to a voltage greater than 0.64v and less than 4v will force continuous synchronous operation regardless of the mode/sync state. run (pin 5): run control input. enables chip operation by tying run above 1.5v. tying it below 1v shuts down the switching regulator. tying it below 0.4v shuts off the entire chip. when tying run to more than 12v, place a resistor (100k to 500k) between run and the voltage source. mode/sync (pin 6): operation mode select. tie this pin to intv cc to force continuous synchronous operation at all output loads. tying it to gnd enables discontinuous mode operation at light loads. applying an external clock signal to this pin will synchronize switching frequency to the external clock. during external clock synchroniza- tion, r t value should be set up such that the free running frequency is within 30% of the external clock frequency. sw (pin 7): switch node connection to external inductor. voltage swing of sw is from a diode voltage drop below ground to v in . v in (pin 8): input voltage. must decouple to gnd with a capacitor close to the v in pin. boost (pin 9): boosted floating driver supply for inter- nal top power mosfet. the (+) terminal of the bootstrap capacitor connects here. this pin swings from a diode voltage drop below intv cc up to v in + intv cc . intv cc (pin 10): internal 5v regulator output. the internal power drivers and control circuits are powered from this voltage. decouple this pin to gnd with a minimum of 1f low esr ceramic capacitor. v out (pin 11): output voltage pin. output of the LTC3600 voltage regulator. also the negative input of the error amplifier which is driven to be the same voltage as iset. pgood (pin 12): output power good with open-drain logic. pgood is pulled to ground when the pgfb pin is more than 0.645v or less than 0.555v. pgood open-drain logic will be disabled if pgfb is tied to intv cc . gnd (exposed pad pin 13): ground. return path of internal power mosfets. connect the exposed pad to the negative terminal of the input capacitor and output capacitor.
LTC3600 9 3600fb functional diagram 3600 bd t on = (1pf) switch logic and anti- shoot-through run run pgfb C + C + ov 0.645v v out pgb uv 0.555v m2 m1 boost on enable 5v reg 12 v in c in v on i ion C + i th 100k 50pf v in v out gnd r ith c ith r set iset ion pll-sync (30%) v on buffer osc C3.3a to 6.7a 3.3a 1.5v 0a to 10a 50a 0.2v 4v 4 3 rt 6 mode/sync r t v von i ion v in intv cc C + C + s r q 20k 200k 100k 2pf 400k i cmp i rev C + 1 5 2 100pf 1 240k ea 9 intv cc 10 v in gnd bg pgood 13 sw tg sense + sense C 7 8 600k c out v out c b l1 c vcc 11 r pg1 r pg2 = t7 in r t intv cc C +
LTC3600 10 3600fb operation main control loop the LTC3600 is a current mode monolithic step down regulator. the accurate 50a current source on the iset pin allows the user to use just one external resistor to program the output voltage in a unity gain buffer fashion. in normal operation, the internal top power mosfet is turned on for a fixed interval determined by a fixed one-shot timer ost. when the top power mosfet turns off, the bottom power mosfet turns on until the current comparator i cmp trips, restarting the one-shot timer and initiating the next cycle. inductor current is determined by sensing the voltage drop across the sw and pgnd nodes of the bottom power mosfet. the voltage on the ith pin sets the comparator threshold corresponding to inductor valley current. the error amplifier, ea, adjusts this ith voltage by comparing the v out voltage with the voltage on iset. if the load current increases, it causes a drop in the v out voltage relative to v iset . the ith voltage then rises until the average inductor current matches that of the load current. at low load current, the inductor current can drop to zero and become negative. this is detected by current rever- sal comparator, i rev , which then shuts off the bottom power mosfet, resulting in discontinuous operation. both power mosfets will remain off with the output capacitor supplying the load current until the ith voltage rises above the zero current level (0.8v) to initiate another cycle. discontinuous mode operation is disabled by tying the mode pin to intv cc , which forces continuous syn- chronous operation regardless of output load. the operating frequency is determined by the value of the r t resistor, which programs the current for the internal oscilla- tor as well as the current for the internal one-shot timer. an internal phase-locked loop servos the switching regulator on-time to track the internal oscillator to force constant switching frequency. if an external synchronization clock is present on the mode/sync pin, the regulator on-time and switching frequency would then track the external clock. overvoltage and undervoltage comparators ov and uv pull the pgood output low if the output power good feedback voltage v pgfb exits a 7.5% window around the regulation point. continuous operation is forced during an ov condition. to defeat the pgood function, simply tie pgfb to intv cc . pulling the run pin to ground forces the LTC3600 into its shutdown state, turning off both power mosfets and all of its internal control circuitry. bringing the run pin above 0.7v turns on the internal reference only, while still keeping the power mosfets off. further increasing the run voltage above 1.5v turns on the entire chip. intv cc regulator an internal low drop out (ldo) regulator produces the 5v supply that powers the drivers and the internal bias circuitry. the intv cc can supply up to 50ma rms and must be bypassed to ground with a minimum of 1f ce- ramic capacitor. good bypassing is necessary to supply the high transient currents required by the power mosfet gate drivers. applications with high input voltage and high switching frequency will increase die temperature because of the higher power dissipation across the ldo. connect- ing a load to the intv cc pin is not recommended since it will further push the ldo into its rms current rating while increasing power dissipation and die temperature. v in overvoltage protection in order to protect the internal power mosfet devices against transient voltage spikes, the LTC3600 constantly monitors the v in pin for an overvoltage condition. when v in rises above 16v, the regulator suspends operation by shutting off both power mosfets and discharges the iset pin voltage to ground. once v in drops below 15v, the regu- lator immediately resumes normal switching operation by first charging up the iset pin to its programmed voltage. programming switching frequency connecting a resistor from the rt pin to gnd programs the switching frequency from 200khz to 4mhz according to the following formula: frequency (hz) = 3.6 ? 10 10 (1/ f) r t () for ease of use, the rt pin can be connected directly to the intv cc pin for 1mhz operation. do not float the rt pin. the internal on-time phase-locked loop has a synchroni- zation range of 30% around its programmed frequency. therefore, during external clock synchronization, the proper
LTC3600 11 3600fb operation r t value should be selected such that the external clock frequency is within this 30% range of the r t programmed frequency. output voltage tracking and soft start the LTC3600 allows the user to program its output voltage ramp rate by means of the iset pin. since v out servos its voltage to that of the iset pin, placing an external capaci- tor c set on the iset pin will program the ramp-up rate of the iset pin and thus the v out voltage. v out(t) = i s r iset set set set set set 1 ? e ? t set set r s c ? ? ? ? ? ? t ss ?? r s c s c n(1 ? 0.9) t ss 2.3r s c from 0 to 90% v out the soft-start time t ss (from 0% to 90% v out ) is 2.3 times of time constant (r set ? c set ). the iset pin can also be driven by an external voltage supply capable of sinking 50a. when starting up into a pre-biased v out , the LTC3600 will stay in discontinuous mode and keep the power switches off until the voltage on iset has ramped up to be equal to v out , at which point the switcher will begin switching and v out will ramp up with iset. output power good when the LTC3600s output voltage is within the 7.5% window of the regulation point, which is reflected back as a v pgfb voltage in the range of 0.555v to 0.645v, the output voltage is in regulation and the pgood pin is pulled high with an external resistor connected to intv cc or another voltage rail. otherwise, an internal open-drain pull-down device (200) will pull the pgood pin low. to prevent unwanted pgood glitches during transients or dynamic v out changes, the LTC3600s pgood falling edge includes a blanking delay of approximately 20s. internal/external ith compensation for ease of use, the user can simplify the loop compen- sation by tying the ith pin to intv cc to enable internal compensation. this connects an internal 100k resistor in series with a 50pf capacitor to the output of the error amplifier (internal ith compensation point). this is a trade-off for simplicity instead of opti-loop ? optimiza- tion, where ith components are external and are selected to optimize the loop transient response with minimum output capacitance. minimum off-time considerations the minimum off-time, t off(min) , is the smallest amount of time that the LTC3600 is capable of turning on the bot- tom power mosfet, tripping the current comparator and turning the power mosfet back off. this time is generally about 50ns. the minimum off-time limit imposes a maxi- mum duty cycle of t on /(t on + t off(min) ). if the maximum duty cycle is reached, due to a dropping input voltage for example, then the output will drop out of regulation. the minimum input voltage to avoid dropout is: v in(min) = v out ? t on + t off(min) t on conversely, the minimum on-time is the smallest dura- tion of time in which the top power mosfet can be in its on state. this time is typically 20ns. in continuous mode operation, the minimum on-time limit imposes a minimum duty cycle of: d min = f sw ? t on(min) where t on(min) is the minimum on-time. as the equation shows, reducing the operating frequency will alleviate the minimum duty cycle constraint. in the rare cases where the minimum duty cycle is sur- passed, the output voltage will still remain in regulation, but the switching frequency will decrease from its programmed value. this is an acceptable result in many applications, so this constraint may not be of critical importance in most cases. high switching frequencies may be used in the design without any fear of severe consequences. as the sections on inductor and capacitor selection show, high switching frequencies allow the use of smaller board com- ponents, thus reducing the size of the application circuit.
LTC3600 12 3600fb c in and c out selection the input capacitance, c in , is needed to filter the trapezoi- dal wave current at the drain of the top power mosfet. to prevent large voltage transients from occurring, a low esr input capacitor sized for the maximum rms current should be used. the maximum rms current is given by: i rms = i out(max) v out v in ? ? ? ? ? ? v in v out ? 1 this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for low input voltage applications, sufficient bulk input capacitance is needed to minimize transient effects during output load changes. the selection of c out is determined by the effective series resistance (esr) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response. the output ripple, v out , is determined by: v out i l 8?f sw ?c out + i l ?r esr the output ripple is highest at maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors are very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. ceramic capacitors have excellent low esr characteristics and small footprints. their relatively low value of bulk capacitance may require multiples in parallel. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the v in input. at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. when choosing the input and output ceramic capacitors, choose the x5r and x7r dielectric formulations. these dielectrics have the best temperature and voltage char- acteristics of all the ceramics for a given value and size. since the esr of a ceramic capacitor is so low, the input and output capacitor must instead fulfill a charge storage requirement. during a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. the time required for the feedback loop to respond is dependent on the compensation and the output capacitor size. typically, three to four cycles are required to respond to a load step, but only in the first cycle does the output drop linearly. the output droop, v droop , is usually about two to three times the linear drop of the first cycle. thus, a good place to start with the output capacitor value is approximately: c out 2.5 ? i out f sw ?v droop more capacitance may be required depending on the duty cycle and load step requirements. applications information
LTC3600 13 3600fb in most applications, the input capacitor is merely required to supply high frequency bypassing, since the impedance to the supply is very low. a 22f ceramic capacitor is usually enough for these conditions. place this input capacitor as close to v in pin as possible. inductor selection given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: i l sw = v out f t l ? ? ? ? ? ? 1 ? v out v in ? ? ? ? ? ? lower ripple current reduces core losses in the inductor, esr losses in the output capacitors, and output voltage ripple. highest efficiency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a trade-off between component size, efficiency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40% of i out(max) . note that the largest ripple current occurs at the highest v in . to guarantee that ripple current does not exceed a specified maximum, the induc- tance should be chosen according to: l = v out t i l(max) ? ? ? ? ? ? 1 ? v out v in(max) ? ? ? ? ? ? sw f applications information table 1. inductor selection table inductor inductance (h) dcr (m) max current (a) dimensions (mm) height (mm) manufacturer ihlp-1616bz-11 series 1.0 2.2 4.7 24 61 95 4.5 3.25 1.7 4.3 4.7 4.3 4.7 4.3 4.7 2 2 2 vishay www.vishay.com ihlp-2020bz-01 series 1 2.2 3.3 4.7 5.6 6.8 18.9 45.6 79.2 108 113 139 7 4.2 3.3 2.8 2.5 2.4 5.4 5.7 5.4 5.7 5.4 5.7 5.4 5.7 5.4 5.7 5.4 5.7 2 2 2 2 2 2 fdv0620 series 1 2.2 3.3 4.7 18 37 51 68 5.7 4 3.2 2.8 6.7 7.4 6.7 7.4 6.7 7.4 6.7 7.4 2 2 2 2 toko www.toko.com mplc0525l series 1 1.5 2.2 16 24 40 6.4 5.2 4.1 6.2 5.4 6.2 5.4 6.2 5.4 2.5 2.5 2.5 nec/tokin www.nec-tokin.com hcp0703 series 1 1.5 2.2 3.3 4.7 6.8 8.2 9 14 18 28 37 54 64 11 9 8 6 5.5 4.5 4 7 7.3 7 7.3 7 7.3 7 7.3 7 7.3 7 7.3 7 7.3 3 3 3 3 3 3 3 cooper bussmann www.cooperbussmann.com rlf7030 series 1 1.5 2.2 3.3 4.7 6.8 8.8 9.6 12 20 31 45 6.4 6.1 5.4 4.1 3.4 2.8 6.9 7.3 6.9 7.3 6.9 7.3 6.9 7.3 6.9 7.3 6.9 7.3 3.2 3.2 3.2 3.2 3.2 3.2 tdk www.tdk.com we-tpc 4828 series 1.2 1.8 2.2 2.7 3.3 3.9 4.7 17 20 23 27 30 47 52 3.1 2.7 2.5 2.35 2.15 1.72 1.55 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8 wrth elektronik www.we-online.com
LTC3600 14 3600fb once the value for l is known, the type of inductor must be selected. ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing satura- tion. ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. the choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/emi requirements. new designs for surface mount inductors are available from toko, vishay, nec/tokin, cooper, tdk, and wrth elektronik. refer to table 1 for more details. checking transient response the opti-loop compensation allows the transient re- sponse to be optimized for a wide range of loads and output capacitors. the availability of the ith pin not only allows optimization of the control loop behavior but also provides a dc coupled and ac filtered closed loop response test point. the dc step, rise time and settling at this test point truly reflects the closed loop response. assuming a predominantly second order system, phase margin and/ or damping factor can be estimated using the percentage of overshoot seen at this pin. the ith external components shown in the figure 1 circuit will provide an adequate starting point for most applica- tions. the series r-c filter sets the dominant pole-zero loop compensation. the values can be modified slightly (from 0.5 to 2 times their suggested values) to optimize transient response once the final pc layout is done and the particular output capacitor type and value have been determined. the output capacitors need to be selected because their various types and values determine the loop feedback factor gain and phase. an output current pulse of 20% to 100% of full load current having a rise time of 1s to 10s will produce output voltage and ith pin waveforms that will give a sense of the overall loop stability without breaking the feedback loop. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load ? esr, where esr is the effective series resistance of c out . i load also begins to charge or discharge c out generat- ing a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. the initial output voltage step may not be within the band- width of the feedback loop, so the standard second order overshoot/dc ratio cannot be used to determine phase margin. the gain of the loop increases with the r ith and the bandwidth of the loop increases with decreasing c ith . if r ith is increased by the same factor that c ith is decreased, the zero frequency will be kept the same, thereby keeping the phase the same in the most critical frequency range of the feedback loop. the output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. for a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to linear technology application note 76. in some applications, a more severe transient can be caused by switching in loads with large (>10f) load capacitors. the discharged load capacitors are effectively put in paral- lel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem, if the switch connecting the load has low resistance and is driven quickly. the solution is to limit the turn-on speed of the load switch driver. a hot swap ? controller is designed specifically for this purpose and usually incorporates cur- rent limit, short-circuit protection, and soft-start. applications information
LTC3600 15 3600fb efficiency considerations the percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. percent efficiency can be expressed as: % efficiency = 100% C (l1 + l2 + l3 + ) where l1, l2, etc., are the individual losses as a percent- age of input power. although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3600 circuits: 1) i 2 r losses, 2) transition losses, 3) switching losses, 4) other losses. 1. i 2 r losses are calculated from the dc resistances of the internal switches, r sw , the external inductor, r l , and board trace resistance, r b . in continuous mode, the average output current flows through inductor l but is chopped between the internal top and bottom power mosfets. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (d) as follows: r sw = (r ds(on)top )(d) + (r ds(on)bot )(1-d) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteristics curves. thus, to obtain i 2 r losses: i 2 r losses = i out 2 (r sw + r l + r b ) 2. transition loss arises from the brief amount of time the top power mosfet spends in the saturated region during switch node transitions. it depends upon the input voltage, load current, internal power mosfet gate capacitance, internal driver strength, and switch- ing frequency. 3. the intv cc current is the sum of the power mosfet driver and control currents. the power mosfet driver current results from switching the gate capacitance of the power mosfets. each time a power mosfet gate is switched from low to high to low again, a packet of charge dq moves from v in to ground. the resulting dq/dt is a current out of intv cc that is typically much larger than the dc control bias current. in continuous mode, i gatechg = f sw (qt + qb), where qt and qb are the gate charges of the internal top and bottom power mosfets and f sw is the switching frequency. since intv cc is a low dropout regulator output powered by v in , the intv cc current also shows up as v in current, unless a separate voltage supply (>5v and <6v) is used to drive intv cc . 4. other hidden losses such as copper trace and internal load resistances can account for additional efficiency degradations in the overall power system. it is very important to include these system level losses in the design of a system. other losses including diode conduc- tion losses during dead-time and inductor core losses generally account for less than 2% total additional loss. thermal considerations in a majority of applications, the LTC3600 does not dis- sipate much heat due to its high efficiency and low thermal resistance of its exposed pad dfn or msop package. how- ever, in applications where the LTC3600 is running at high ambient temperature, high v in , high switching frequency and maximum output current load, the heat dissipated may exceed the maximum junction temperature of the part. if the junction temperature reaches approximately 160c, both power switches will be turned off until temperature is about 15c cooler. to avoid the LTC3600 from exceeding the maximum junc- tion temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. the temperature rise is given by: t rise = p d ? ja applications information
LTC3600 16 3600fb as an example, consider the case when the LTC3600 is used in application where v in = 12v, i out = 1.5a, frequency = 4mhz, v out = 1.8v. the equivalent power mosfet resistance r sw is: r sw = r ds(on)top ? v out v in + r ds(on)bot ? v in ? v out v in = 0.2 ? 1.8 12 + 0.1 ? 10.2 12 = 0.115 the v in current during 4mhz forced continuous operation with no load is about 11ma, which includes switching and internal biasing current loss, transition loss, inductor core loss and other losses in the application. therefore, the total power dissipated by the part is: p d = i out 2 ? r sw + v in ? i vin (no load) = 2.25a 2 ? 0.115 + 12v ? 11ma = 0.39w the dfn 3mm 3mm package junction-to-ambient thermal resistance, ja , is around 55c/w. therefore, the junction temperature of the regulator operating in a 50c ambient temperature is approximately: t j = 0.39w t 55 c w + 50c = 71c remembering that the above junction temperature is obtained from an r ds(on) at 25c, we might recalculate the junction temperature based on a higher r ds(on) since it increases with temperature. redoing the calculation assuming that r sw increased 25% at 71c yields a new junction temperature of 75c, which is still very far away from thermal shutdown or maximum allowed junction temperature rating. board layout considerations when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3600. check the following in your layout: 1. do the capacitors c in connect to the power v in and power gnd as close as possible? these capacitors provide the ac current to the internal power mosfets and their drivers. 2. are c out and inductor closely connected? the (C) plate of c out returns current to pgnd and the (C) plate of c in . 3. the ground terminal of the iset resistor must be connected to the other quiet signal gnd and together connect to the power gnd on only one point. the iset resistor should be placed and routed away from noisy components and traces, such as the sw line, and its trace should be minimized. 4. keep sensitive components away from the sw pin. the iset resistor, r t resistor, the compensation components c ith and r ith , and the intv cc bypass capacitor, should be routed away from the sw trace and the inductor. 5. a ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the signal gnd at one point which is then connected to the power gnd at the exposed pad with minimal resistance. flood all unused areas on all layers with copper, which reduces the temperature rise of power components. these copper areas should be connected to one of the input supplies: v in or gnd. applications information
LTC3600 17 3600fb design example as a design example, consider using the LTC3600 in an application with the following specifications: v in = 10.8v to 13.2v v out = 1.8v i out(max) = 1.5a i out(min) = 500ma f sw = 2mhz first, r set is selected based on: r set = v out 50a = 1.8v 50a = 36k for best accuracy, a 0.1% 36.1k resistor is selected. because efficiency is important at both high and low load current, discontinuous mode operation will be utilized. select from the characteristic curves the correct r t resis- tor value for 2mhz switching frequency. based on that, r t should be 18.2k. then calculate the inductor value for about 40% ripple current at maximum v in : l= = 1.8v 2mhz t 0.6a ? ? ? ? ? ? 1 ? 1.8v 13.2v ? ? ? ? ? ? 1.3h the nearest standard value inductor would be 1.2h. c out will be selected based on the esr that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. for this design, one 47f ceramic capacitor will be used. c in should be sized for a maximum current rating of: i rms = 1.5a 1.8v 13.2v ? ? ? ? ? ? 13.2v 1.8v ? 1 ? ? ? ? ? ? 1/ 2 = 0.51a decoupling the v in pin with one 22f ceramic capacitor is adequate for most applications. applications information
LTC3600 18 3600fb 12v to 1.2v 2mhz buck regulator typical applications figure 1. 12v to 3.3v 1mhz buck regulator 3600 f01 50a 10f 100k 1f 36.5k 0.1f 22f 2.2h v in 4v to 15v v in v out 3.3v intv cc iset rt pgfb ith pgood run boost sw LTC3600 mode/ sync 0.1f 56k 66.5k pwm control and switch driver 8 5 7 9 1 6 10 3 gnd 13 4 2 12 11 v out 10pf 68pf C + error amp 3600 ta02 50a 10f 100k 1f 18.7k 100k 0.1f 22f 0.47h v in 4v to 15v v in v out 1.2v intv cc iset rt pgfb ith pgood run boost sw LTC3600 mode/ sync 0.1f 100k 24k pwm control and switch driver 8 5 7 9 1 6 10 3 gnd 13 4 2 12 11 v out 100k C + error amp
LTC3600 19 3600fb typical applications 0.9v fpga power supply 50a 10f 0.1f 1.1h v in v in iset run boost sw LTC3600 4.53k 50a 10f 0.1f 22f 1.1h v in v in 4v to 12v iset run boost sw LTC3600 pwm control and switch driver pwm control and switch driver 22f 8 5 7 9 1 11 v out 8 5 7 9 1 11 v out 0.1f 1f intv cc rt pgfb ith pgood mode/ sync 10pf 10pf 6 10 3 4 2 12 1f intv cc rt pgfb ith pgood mode/ sync 330pf 5k 10pf 6 10 3 4 2 12 3600 ta03 50a 10f 0.1f 1.1h v in v out (0.9v, 6a) iset run boost sw set mod gnd out3 out4 LTC3600 50a 10f 0.1f 22f 1.1h v in iset run boost sw LTC3600 pwm control and switch driver pwm control and switch driver 8 5 7 9 1 11 v out 8 5 7 9 11 v out 0.1f 1f intv cc rt pgfb ith pgood mode/ sync 6 10 3 4 2 12 22f 1f 10pf intv cc rt pgfb ith pgood mode/ sync 61 10 3 4 2 12 fpga 15k intv cc *external clock for frequency synchronization is recommended gnd 13 gnd 13 gnd 13 gnd 13 v+ div ph out1 out2 ltc6902* v in v in C + error amp C + error amp C + error amp C + error amp
LTC3600 20 3600fb typical applications high efficiency fast load response power supply 50a 10f 100k 0.1f 22f 2.2h v in iset run boost sw LTC3600 pwm control and switch driver 402 4v to 15v 1f intv cc rt pgfb ith pgood mode/ sync 68pf 56k 3600 ta04 v out 2.52v 1.5a 50a 10f in v control set out lt3083 0.1f 3.3v 8 5 7 9 1 11 v out 6103 4 212 gnd 13 24.9k C + error amp
LTC3600 21 3600fb typical applications led driver with programmable dimming control 50a 10f 100k 0.1f 0.1 22f 10h* v in iset run boost sw LTC3600 pwm control and switch driver 8 5 7 9 1 11 v out 0k to 1k (led current: 20ma to 500ma) 15v 1f intv cc rt pgfb ith pgood mode/ sync 6 10 3 4 2 12 i out ** gnd 13 tdk ltf5022t-100m1r4-lc luxeon lxml-pwn1-0100 * ** 3600 ta05 C + error amp high efficiency 12v audio driver 50a 10f 0.1f 8 speaker 10f 10f 4.7h 4.7f v in iset run boost sw LTC3600 pwm control and switch driver 8 5 7 9 1 11 v out 12v 1f intv cc rt pgfb ith pgood mode/ sync 120k 10nf audio signal 220pf 6 10 3 4 2 12 3600 ta06 3k gnd 13 C + error amp
LTC3600 22 3600fb programmable 1.5a current source typical applications 12v fan speed controller 50a 10f 0.1f 0.1 22f 2.2h v in iset run boost sw LTC3600 pwm control and switch driver 8 5 7 9 1 11 v out 0k to 3k 12v 1f intv cc rt pgfb ith pgood mode/ sync 6 10 3 4 2 12 3600 ta07 i out = 0a to 1.5a gnd 13 C + error amp 50a 10f 100k 15v 0.1f 2.2h v in v in intv cc 49.9k 16.2k 12v dc fan v + iset run boost sw LTC3600 pwm control and switch driver 22f 1f intv cc rt pgfb ith pgood 6.04k 100k mode/ sync 3600 ta08 alarm: logic 1 if temp > 85c *10k ntc thermistor murata ncp18xh103f03rb C + 80.6k * 8 5 7 9 1 11 v out 6103 4 212 lt1784 gnd 13 113k C + error amp
LTC3600 23 3600fb 15v, 3a dual phase single-output regulator typical applications 3600 ta09 50a 10f 0.1f 2.2h v in iset run boost sw LTC3600 24.9k pwm control and switch driver 50a 10f 0.1f 22f 2.2h v in iset run boost sw LTC3600 pwm control and switch driver 22f 8 5 7 9 1 11 v out 8 5 7 9 1 11 v out 1f intv cc rt pgfb ith pgood mode/ sync 0.1f 10pf 610 3 gnd 13 4 2 12 1f 100k intv cc rt pgfb ith pgood mode/ sync 10pf 100k 610 3 gnd 13 4 2 12 v in 4v to 15v v in 4v to 15v v out = 2.5v 3a out1 out2 mod v+ gnd set intv cc ltc6908-1* *external clock for frequency synchronization is recommended 100k 27k 150pf C + error amp C + error amp
LTC3600 24 3600fb typical applications 1.5a lab supply with programmable current limit 50a 10f 100k 100k 0.1f 2.2h v in iset run boost sw LTC3600 50a 10f 15v 0.1f 0.1 22f 2.2h v in iset run boost sw LTC3600 pwm control and switch driver pwm control and switch driver 22f 8 5 7 9 1 11 v out 8 5 7 9 1 11 v out 0k to 3k 1f intv cc rt pgfb ith pgood mode/ sync 6 10 3 4 2 12 1f intv cc rt pgfb ith pgood mode/ sync 6 10 3 4 2 12 3600 ta10 i out = 0a to 1.5a v out = 0v to 12v 0k to 240k gnd 13 gnd 13 C + error amp C + error amp
LTC3600 25 3600fb package description 3.00 0.10 (4 sides) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad and tie bars shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.65 0.10 0.75 0.05 r = 0.115 typ 1 6 12 7 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dd12) dfn 0106 rev a recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.23 0.05 0.25 0.05 2.25 ref 2.38 0.05 1.65 0.05 2.10 0.05 0.70 0.05 3.50 0.05 package outline pin 1 notch r = 0.20 or 0.25 w 45 chamfer 2.38 0.10 2.25 ref 0.45 bsc 0.45 bsc dd package 12-lead plastic dfn (3mm w 3mm) (reference ltc dwg # 05-08-1725 rev a) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LTC3600 26 3600fb package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. mse package 12-lead plastic msop , exposed die pad (reference ltc dwg # 05-08-1666 rev f) msop (mse12) 0911 rev f 0.53 t 0.152 (.021 t .006) seating plane 0.18 (.007) 1.10 (.043) max 0.22 C?0.38 (.009 C .015) typ 0.86 (.034) ref 0.650 (.0256) bsc 12 12 11 10 9 8 7 7 detail b 1 6 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 s C 6 s typ detail a detail a gauge plane recommended solder pad layout bottom view of exposed pad option 2.845 t 0.102 (.112 t .004) 2.845 t 0.102 (.112 t .004) 4.039 t 0.102 (.159 t .004) (note 3) 1.651 t 0.102 (.065 t .004) 1.651 t 0.102 (.065 t .004) 0.1016 t 0.0508 (.004 t .002) 123456 3.00 t 0.102 (.118 t .004) (note 4) 0.406 t 0.076 (.016 t .003) ref 4.90 t 0.152 (.193 t .006) detail b corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 t 0.127 (.035 t .005) 0.42 t 0.038 (.0165 t .0015) typ 0.65 (.0256) bsc
LTC3600 27 3600fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 03/12 clarified feature and description clarified electrical characteristics clarified iset (pin 1) description clarified functional diagram modified application circuit 1 3 8 9 28 b 04/12 changed mode/sync threshold sync v ih(min) from 1v to 2.5v 3
LTC3600 28 3600fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 0412 rev b ? printed in usa related parts typical application part number description comments ltc3601 15v, 1.5a (i out ), 4mhz, synchronous step-down dc/dc converter 95% efficiency, v in : 4.5v to 15v, v out(min) = 0.6v, i q = 300a, i sd < 1a, 4mm 4mm qfn-20 and msop-16e packages ltc3603 15v, 2.5a (i out ), 3mhz, synchronous step-down dc/dc converter 95% efficiency, v in : 4.5v to 15v, v out(min) = 0.6v, i q = 75a, i sd < 1a, 4mm 4mm qfn-20 and msop-16e packages ltc3633 15v, dual 3a (i out ), 4mhz, synchronous step-down dc/ dc converter 95% efficiency, v in : 3.6v to 15v, v out(min) = 0.6v, i q = 500a, i sd < 15a, 4mm 5mm qfn-28 and tssop-28e packages ltc3605 15v, 5a (i out ), 4mhz, synchronous step-down dc/dc converter 95% efficiency, v in : 4v to 15v, v out(min) = 0.6v, i q = 2ma, i sd < 15a, 4mm 4mm qfn-24 and msop-16e packages ltc3604 15v, 2.5a (i out ), 4mhz, synchronous step-down dc/dc converter 95% efficiency, v in : 3.6v to 15v, v out(min) = 0.6v, i q = 300a, i sd < 14a, 3mm 3mm qfn-16 and msop-16e packages lt3080 1.1a, parallelable, low noise, low dropout linear regulator 300mv dropout voltage (2 supply operation), low noise = 40v rms v in : 1.2v to 36v, v out : 0v to 35.7v, msop-8, 3mm 3mm dfn packages lt3083 adjustable 3a single resistor low dropout regulator 310mv dropout voltage, low noise 40v rms v in : 1.2v to 23v, v out : 0v to 22.7v, 4mm 4mm dfn, tssop-16e packages high efficiency, low noise 1a supply 3600 ta11 50a 10a 10f 100k 0.1f 10f 10k 22f 3.3h v in v track = v out + 0.5v iset run boost sw LTC3600 pwm control and switch driver 8 5 7 9 1 11 v out 1f intv cc rt pgfb ith pgood mode/ sync 68pf 6103 gnd 13 4 2 12 v in 8v to 15v in v control out set lt3080 lt3080 56k 0.1f 0k to 499k v out = 0v to 5v 1ma to 1a C + error amp

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